The design of PCI express for future communication platform

Eugin Hyun, Kwang Su Seong

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper, we design a PCI Express controller for Endpoint, called as APCE. The APCE supports full functionality of Transaction Layer and Data Link Layer of PCI Express. We propose an efficient buffer management scheme for APCE to obey Replay mechanism and it can dynamically adjust size of a replay buffer space. And we employ 80C51 to effectively manage designed functional blocks in APCE, and implement Real-Time OS, MicroC/OS II on 80C51. We also code software under real time environment. This coded software covers supporting the replay mechanism, checking and generating error message, processing TLP acknowledgment, management for exchanging Flow Control. For verifying the APCE, we build a test bench including behavioral models of Host Bridge, local master, and local slave. We also propose an effective verification to compliance and corner case testing as using behavioral reference model of APCE, Random Generator, and Compare Engine.

Original languageEnglish
Title of host publicationProceedings of 2004 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2004
EditorsS.J. Ko
Pages734-739
Number of pages6
StatePublished - 2004
EventProceedings of 2004 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2004 - Seoul, Korea, Republic of
Duration: 18 Nov 200419 Nov 2004

Publication series

NameProceedings of 2004 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2004

Conference

ConferenceProceedings of 2004 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2004
Country/TerritoryKorea, Republic of
CitySeoul
Period18/11/0419/11/04

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