Abstract
Deep neural networks (DNNs) have been deployed in many safety-critical real-time embedded systems. To support DNN tasks in real-time, most previous studies focused on GPU or CPU. However, Edge TPU has not yet been studied for real-time guarantees. This paper presents a real-time DNNs framework for Edge TPU to satisfy multiple DNN inference tasks' timing requirements. The proposed framework provides 1) SRAM allocation and model partitioning techniques and 2) a MIP-based algorithm that determines the amount of SRAM and the number of segments for each task. The experiment result shows that our framework provides 79% higher schedulability than the existing Edge TPU system.
| Original language | English |
|---|---|
| Title of host publication | 2023 60th ACM/IEEE Design Automation Conference, DAC 2023 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9798350323481 |
| DOIs | |
| State | Published - 2023 |
| Event | 60th ACM/IEEE Design Automation Conference, DAC 2023 - San Francisco, United States Duration: 9 Jul 2023 → 13 Jul 2023 |
Publication series
| Name | Proceedings - Design Automation Conference |
|---|---|
| Volume | 2023-July |
| ISSN (Print) | 0738-100X |
Conference
| Conference | 60th ACM/IEEE Design Automation Conference, DAC 2023 |
|---|---|
| Country/Territory | United States |
| City | San Francisco |
| Period | 9/07/23 → 13/07/23 |
Bibliographical note
Publisher Copyright:© 2023 IEEE.
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