Power-aware data buffer cache management in real-time embedded databases

The demand for real-time data services in embedded systems is increasing. In these new computing platforms, using traditional buffer management schemes, whose goal is to minimize the number of I/O operations, is problematic since they do not consider the constraints of those platforms such as limited energy and distinctive underlying storage. In particular, due to asymmetric read/write characteristic of flash memory, minimum buffer misses neither coincide with minimum power consumption nor minimum I/O deadline miss ratio. In this paper we propose a power-aware buffer cache management scheme for real-time databases whose secondary storage is a flash memory. We focus on the problem of guaranteeing the performance goal in terms of both I/O power consumption and I/O deadline miss ratio. To address this problem, we propose logical partitioning of the global buffer pool into read and write buffer pools, and dynamic feedback control of read/write buffer pool sizes to satisfy both performance goals. We have shown through an extensive evaluation that our approach satisfies both performance goals in a variety of workloads and access patterns with considerably smaller size of buffer pools compared to baseline approaches.