LUPIS: Latch-up based ultra efficient processing in-memory system

Joonseop Sim, Mohsen Imani, Woojin Choi, Yeseong Kim, Tajana Rosing

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Internet of Things (IoT) involves processing massive data. This poses a huge challenge in the current computing systems due to the limited memory bandwidth. Processing in-memory (PIM) is a promising candidate to minimize this bottleneck and reduce the performance gap between processor and memory latency. We propose LUPIS (Latch-Up based Processing In-memory System) for nonvolatile memory (NVM). Unlike existing PIM techniques, which mainly focus on bitwise operation based computations and involve considerable latency and area penalty, our design facilitates computations like addition and multiplication with very low latency. This makes the system faster and more efficient as compared to the state-of-the-art technologies. We evaluate LUPIS at both circuit-level and application-level. Our evaluations show that LUPIS can enhance the performance and energy efficiency by 62× and 484× respectively as compared to a recent GPGPU architecture. Compared to the state-of-the-art PIM accelerator, our design presents 12.7× and 20.9× improvement in latency and energy consumption with insignificant overhead of 21% for area increase and one cycle for latency delay.

Original languageEnglish
Title of host publication2018 19th International Symposium on Quality Electronic Design, ISQED 2018
PublisherIEEE Computer Society
Pages55-60
Number of pages6
ISBN (Electronic)9781538612149
DOIs
StatePublished - 9 May 2018
Event19th International Symposium on Quality Electronic Design, ISQED 2018 - Santa Clara, United States
Duration: 13 Mar 201814 Mar 2018

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2018-March
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Conference

Conference19th International Symposium on Quality Electronic Design, ISQED 2018
Country/TerritoryUnited States
CitySanta Clara
Period13/03/1814/03/18

Bibliographical note

Publisher Copyright:
© 2018 IEEE.

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