Abstract
We propose a new system-level solution that improves both the performance and lifetime of NAND storage systems by exploiting the performance asymmetry of NAND devices. At the device level, we propose a new program sequence, called relaxed program sequence (RPS), which allows more flexible page allocations in a block without compromising NAND reliability. By combining RPS with per-block parity pages, we can improve the write bandwidth and eliminate expensive paired page backup operations. Experimental results show that the proposed technique can increase IOPS by up to 56% and reduce the number of block erasures by up to 30% over an existing RPS-oblivious FTL.
| Original language | English |
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| Title of host publication | Proceedings of the 53rd Annual Design Automation Conference, DAC 2016 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781450342360 |
| DOIs | |
| State | Published - 5 Jun 2016 |
| Event | 53rd Annual ACM IEEE Design Automation Conference, DAC 2016 - Austin, United States Duration: 5 Jun 2016 → 9 Jun 2016 |
Publication series
| Name | Proceedings - Design Automation Conference |
|---|---|
| Volume | 05-09-June-2016 |
| ISSN (Print) | 0738-100X |
Conference
| Conference | 53rd Annual ACM IEEE Design Automation Conference, DAC 2016 |
|---|---|
| Country/Territory | United States |
| City | Austin |
| Period | 5/06/16 → 9/06/16 |
Bibliographical note
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