Improving performance and lifetime of NAND storage systems using relaxed program sequence

Jisung Park; Jaeyong Jeong; Sungjin Lee; Youngsun Song; Jihong Kim

doi:10.1145/2897937.2898032

Improving performance and lifetime of NAND storage systems using relaxed program sequence

Jisung Park, Jaeyong Jeong, Sungjin Lee, Youngsun Song, Jihong Kim

Department of Electrical Engineering and Computer Science

Seoul National University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

23 Scopus citations

Abstract

We propose a new system-level solution that improves both the performance and lifetime of NAND storage systems by exploiting the performance asymmetry of NAND devices. At the device level, we propose a new program sequence, called relaxed program sequence (RPS), which allows more flexible page allocations in a block without compromising NAND reliability. By combining RPS with per-block parity pages, we can improve the write bandwidth and eliminate expensive paired page backup operations. Experimental results show that the proposed technique can increase IOPS by up to 56% and reduce the number of block erasures by up to 30% over an existing RPS-oblivious FTL.

Original language	English
Title of host publication	Proceedings of the 53rd Annual Design Automation Conference, DAC 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781450342360
DOIs	https://doi.org/10.1145/2897937.2898032
State	Published - 5 Jun 2016
Event	53rd Annual ACM IEEE Design Automation Conference, DAC 2016 - Austin, United States Duration: 5 Jun 2016 → 9 Jun 2016

Publication series

Name	Proceedings - Design Automation Conference
Volume	05-09-June-2016
ISSN (Print)	0738-100X

Conference

Conference	53rd Annual ACM IEEE Design Automation Conference, DAC 2016
Country/Territory	United States
City	Austin
Period	5/06/16 → 9/06/16

Bibliographical note

Publisher Copyright:
© 2016 ACM.

Access to Document

10.1145/2897937.2898032

Cite this

Park, J., Jeong, J., Lee, S., Song, Y., & Kim, J. (2016). Improving performance and lifetime of NAND storage systems using relaxed program sequence. In Proceedings of the 53rd Annual Design Automation Conference, DAC 2016 Article a63 (Proceedings - Design Automation Conference; Vol. 05-09-June-2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/2897937.2898032

@inproceedings{bf4fc3bfe3764fcf9aeba99e9e3bcc79,

title = "Improving performance and lifetime of NAND storage systems using relaxed program sequence",

abstract = "We propose a new system-level solution that improves both the performance and lifetime of NAND storage systems by exploiting the performance asymmetry of NAND devices. At the device level, we propose a new program sequence, called relaxed program sequence (RPS), which allows more flexible page allocations in a block without compromising NAND reliability. By combining RPS with per-block parity pages, we can improve the write bandwidth and eliminate expensive paired page backup operations. Experimental results show that the proposed technique can increase IOPS by up to 56% and reduce the number of block erasures by up to 30% over an existing RPS-oblivious FTL.",

author = "Jisung Park and Jaeyong Jeong and Sungjin Lee and Youngsun Song and Jihong Kim",

note = "Publisher Copyright: {\textcopyright} 2016 ACM.; 53rd Annual ACM IEEE Design Automation Conference, DAC 2016 ; Conference date: 05-06-2016 Through 09-06-2016",

year = "2016",

month = jun,

day = "5",

doi = "10.1145/2897937.2898032",

language = "English",

series = "Proceedings - Design Automation Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "Proceedings of the 53rd Annual Design Automation Conference, DAC 2016",

}

Park, J, Jeong, J, Lee, S, Song, Y & Kim, J 2016, Improving performance and lifetime of NAND storage systems using relaxed program sequence. in Proceedings of the 53rd Annual Design Automation Conference, DAC 2016., a63, Proceedings - Design Automation Conference, vol. 05-09-June-2016, Institute of Electrical and Electronics Engineers Inc., 53rd Annual ACM IEEE Design Automation Conference, DAC 2016, Austin, United States, 5/06/16. https://doi.org/10.1145/2897937.2898032

Improving performance and lifetime of NAND storage systems using relaxed program sequence. / Park, Jisung; Jeong, Jaeyong; Lee, Sungjin et al.
Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. a63 (Proceedings - Design Automation Conference; Vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Improving performance and lifetime of NAND storage systems using relaxed program sequence

AU - Park, Jisung

AU - Jeong, Jaeyong

AU - Lee, Sungjin

AU - Song, Youngsun

AU - Kim, Jihong

PY - 2016/6/5

Y1 - 2016/6/5

N2 - We propose a new system-level solution that improves both the performance and lifetime of NAND storage systems by exploiting the performance asymmetry of NAND devices. At the device level, we propose a new program sequence, called relaxed program sequence (RPS), which allows more flexible page allocations in a block without compromising NAND reliability. By combining RPS with per-block parity pages, we can improve the write bandwidth and eliminate expensive paired page backup operations. Experimental results show that the proposed technique can increase IOPS by up to 56% and reduce the number of block erasures by up to 30% over an existing RPS-oblivious FTL.

AB - We propose a new system-level solution that improves both the performance and lifetime of NAND storage systems by exploiting the performance asymmetry of NAND devices. At the device level, we propose a new program sequence, called relaxed program sequence (RPS), which allows more flexible page allocations in a block without compromising NAND reliability. By combining RPS with per-block parity pages, we can improve the write bandwidth and eliminate expensive paired page backup operations. Experimental results show that the proposed technique can increase IOPS by up to 56% and reduce the number of block erasures by up to 30% over an existing RPS-oblivious FTL.

UR - http://www.scopus.com/inward/record.url?scp=84977138518&partnerID=8YFLogxK

U2 - 10.1145/2897937.2898032

DO - 10.1145/2897937.2898032

M3 - Conference contribution

AN - SCOPUS:84977138518

T3 - Proceedings - Design Automation Conference

BT - Proceedings of the 53rd Annual Design Automation Conference, DAC 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 53rd Annual ACM IEEE Design Automation Conference, DAC 2016

Y2 - 5 June 2016 through 9 June 2016

ER -

Improving performance and lifetime of NAND storage systems using relaxed program sequence

Abstract

Publication series

Conference

Bibliographical note

Access to Document

Other files and links

Fingerprint

Cite this