Abstract
For the first time, we integrated poly-Si gate CMOSFETs with nitrogen incorporated HfO2-Al2O3 laminate (HfAlON) as gate dielectrics. Both low gate leakage currents (0.1mA/cm2 at Vg=+1.0V) and low EOT (15.6 Å) sufficiently satisfy the specifications (EOT=12∼20Å, Jg=2.2mA/cm2) estimated by ITRS for low power applications. By in-situ 3 step post-deposition annealing, approximately 17 at.% nitrogen is incorporated at the HfAlON/Si interface. In-situ 3 step post-deposition annealing decreases metallic Hf bonding, which exists at the HfO2-Al2O3 laminate/Si interface. As a result, we can suppress C-V hysteresis and improve current performance. Finally, well-behaved 100 nm CMOSFET devices are achieved. The measured saturation currents at 1.2V Vdd are 585μA/μm (Ioff=10nA/μm) for nMOSFET and 265μA/μm (Ioff=10nA/ μm) for pMOSFET, which are approximately 80% of those of nitrided SiO2. In terms of Ion-Ioff characteristics of n/pMOSFETs, these are the best current performance compared with previous reports for the poly-Si gate CMOSFETs with high-k gate dielectrics.
Original language | English |
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Pages (from-to) | 853-856 |
Number of pages | 4 |
Journal | Technical Digest - International Electron Devices Meeting, IEDM |
State | Published - 2002 |
Event | 2002 IEEE International Devices Meeting (IEDM) - San Francisco, CA, United States Duration: 8 Dec 2002 → 11 Dec 2002 |