Graphene arch gate SiO2 shell silicon nanowire core field effect transistors

J. E. Jin, J. H. Lee, D. H. Hwang, D. W. Kim, M. J. Kim, K. S. Son, D. Whang, S. W. Hwang

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

We report the realization of graphene arch gate silicon nanowire field effect transistors with SiO2 shell serving as a gate insulator. The arch coverage of the SiO2 shell was achieved by the flexible graphene layers complying the top of the shell. The wrapping angle was defined by the relative strength of the van der Waals forces on the shell and the substrate. The leakage current of the graphene gate was only 55 fA, while the maximum on-off ratio of 16.7 was obtained. The effective mobility and quantum capacitance of the graphene layers were also obtained from the electronic transport data.

Original languageEnglish
Article number212102
JournalApplied Physics Letters
Volume99
Issue number21
DOIs
StatePublished - 21 Nov 2011

Bibliographical note

Funding Information:
This CRI work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korean Government (MEST) (No. 2011-0000427).

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