Energy efficient hardware architecture of LU triangularization for MIMO receiver

Ji Woong Choi; Jungwon Lee; Byung Gueon Min; Jongsun Park

doi:10.1109/TCSII.2010.2055991

Energy efficient hardware architecture of LU triangularization for MIMO receiver

Ji Woong Choi, Jungwon Lee, Byung Gueon Min, Jongsun Park

Department of Electrical Engineering and Computer Science

Research output: Contribution to journal › Article › peer-review

5 Scopus citations

Abstract

An energy-efficient hardware architecture of complex-valued matrix lower-upper (LU) triangularization for multi-inputmulti-output (MIMO) receivers is presented in this paper. In the LU triangularization process, Gaussian elimination operation is expressed as a series of vector-scalar products, where basic common computations can be precomputed and shared to reduce computational complexity. Our computation-sharing-based architecture was implemented using a 0.25-mu CMOS process, and the hardware can perform LU triangularization from 2×2 to 8×8 matrices. Numerical results show that the proposed architecture has considerable energy savings over conventional matrix triangularization schemes.

Original language	English
Article number	5545379
Pages (from-to)	632-636
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	57
Issue number	8
DOIs	https://doi.org/10.1109/TCSII.2010.2055991
State	Published - Aug 2010

Bibliographical note

Funding Information:
Manuscript received March 11, 2009; revised March 6, 2010; accepted May 3, 2010. Date of current version August 13, 2010. This work was supported in part by the Ubiquitous Computing and Network (UCN) Project, Knowledge and Economy Frontier R&D Program of the Ministry of Knowledge Economy in Korea under UCN’s Subproject 10C2-C2-30S. This work was recommended by Associate Editor M. Chakraborty. J.-W. Choi and J. Lee are with Marvell Semiconductor, Santa Clara, CA 95054 USA (e-mail: [email protected], [email protected]). B. G. Min is with Mewtel Technology, Seoul 143-200, Korea. J. Park is with the School of Electrical Engineering, Korea University, Seoul 136-701, Korea (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCSII.2010.2055991

Keywords

LU triangularization
Low-power very large scale integration (VLSI) design
matrix decomposition
multi-inputmulti-output (MIMO) demodulation

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10.1109/TCSII.2010.2055991

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abstract = "An energy-efficient hardware architecture of complex-valued matrix lower-upper (LU) triangularization for multi-inputmulti-output (MIMO) receivers is presented in this paper. In the LU triangularization process, Gaussian elimination operation is expressed as a series of vector-scalar products, where basic common computations can be precomputed and shared to reduce computational complexity. Our computation-sharing-based architecture was implemented using a 0.25-mu CMOS process, and the hardware can perform LU triangularization from 2×2 to 8×8 matrices. Numerical results show that the proposed architecture has considerable energy savings over conventional matrix triangularization schemes.",

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Energy efficient hardware architecture of LU triangularization for MIMO receiver

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Keywords

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