Effect of Si lattice strain on the reliability characteristics of ultrathin SiO2 on a 4° tilted wafer

Hyo Sik Chang; Sangmu Choi; Hyundoek Yang; Kyung Youl Min; Dae Won Moon; Hyung Ik Lee; Hyunsang Hwang

doi:10.1063/1.1435404

Effect of Si lattice strain on the reliability characteristics of ultrathin SiO₂ on a 4° tilted wafer

Hyo Sik Chang, Sangmu Choi, Hyundoek Yang, Kyung Youl Min, Dae Won Moon, Hyung Ik Lee, Hyunsang Hwang

Department of New Biology

Gwangju Institute of Science and Technology

Research output: Contribution to journal › Article › peer-review

13 Scopus citations

Abstract

The electrical and structural characteristics of an ultrathin gate dielectric, thermally grown on 4° tilted wafer has been investigated. Compared with a control wafer, a relaxation of the Si lattice strain at the SiO₂/Si(001) interface was observed for the 4° tilted wafer, which was confirmed by medium energy ion scattering spectroscopy. A significant improvement in the reliability characteristics of a metal-oxide-semiconductor (MOS) capacitor, with a 2.5-nm-thick gate oxide, grown on a tilt wafer was observed. This improvement in reliability can be explained by the relaxation of strain at the SiO₂/Si interface. An ultrathin gate dielectric grown on a tilt wafer represents a promising alternative for gate dielectric applications in future MOS devices.

Original language	English
Pages (from-to)	386-388
Number of pages	3
Journal	Applied Physics Letters
Volume	80
Issue number	3
DOIs	https://doi.org/10.1063/1.1435404
State	Published - 21 Jan 2002

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title = "Effect of Si lattice strain on the reliability characteristics of ultrathin SiO2 on a 4° tilted wafer",

abstract = "The electrical and structural characteristics of an ultrathin gate dielectric, thermally grown on 4° tilted wafer has been investigated. Compared with a control wafer, a relaxation of the Si lattice strain at the SiO2/Si(001) interface was observed for the 4° tilted wafer, which was confirmed by medium energy ion scattering spectroscopy. A significant improvement in the reliability characteristics of a metal-oxide-semiconductor (MOS) capacitor, with a 2.5-nm-thick gate oxide, grown on a tilt wafer was observed. This improvement in reliability can be explained by the relaxation of strain at the SiO2/Si interface. An ultrathin gate dielectric grown on a tilt wafer represents a promising alternative for gate dielectric applications in future MOS devices.",

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T1 - Effect of Si lattice strain on the reliability characteristics of ultrathin SiO2 on a 4° tilted wafer

AU - Chang, Hyo Sik

AU - Choi, Sangmu

AU - Yang, Hyundoek

AU - Min, Kyung Youl

AU - Moon, Dae Won

AU - Lee, Hyung Ik

AU - Hwang, Hyunsang

PY - 2002/1/21

Y1 - 2002/1/21

N2 - The electrical and structural characteristics of an ultrathin gate dielectric, thermally grown on 4° tilted wafer has been investigated. Compared with a control wafer, a relaxation of the Si lattice strain at the SiO2/Si(001) interface was observed for the 4° tilted wafer, which was confirmed by medium energy ion scattering spectroscopy. A significant improvement in the reliability characteristics of a metal-oxide-semiconductor (MOS) capacitor, with a 2.5-nm-thick gate oxide, grown on a tilt wafer was observed. This improvement in reliability can be explained by the relaxation of strain at the SiO2/Si interface. An ultrathin gate dielectric grown on a tilt wafer represents a promising alternative for gate dielectric applications in future MOS devices.

AB - The electrical and structural characteristics of an ultrathin gate dielectric, thermally grown on 4° tilted wafer has been investigated. Compared with a control wafer, a relaxation of the Si lattice strain at the SiO2/Si(001) interface was observed for the 4° tilted wafer, which was confirmed by medium energy ion scattering spectroscopy. A significant improvement in the reliability characteristics of a metal-oxide-semiconductor (MOS) capacitor, with a 2.5-nm-thick gate oxide, grown on a tilt wafer was observed. This improvement in reliability can be explained by the relaxation of strain at the SiO2/Si interface. An ultrathin gate dielectric grown on a tilt wafer represents a promising alternative for gate dielectric applications in future MOS devices.

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DO - 10.1063/1.1435404

M3 - Article

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SN - 0003-6951

VL - 80

SP - 386

EP - 388

JO - Applied Physics Letters

JF - Applied Physics Letters

IS - 3

ER -

Effect of Si lattice strain on the reliability characteristics of ultrathin SiO₂ on a 4° tilted wafer

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