Abstract
This paper presents an ultra-low-noise differential relaxation oscillator implemented in a 0.18-pm standard CMOS process. The proposed oscillator having output frequency of 10.5 MHz achieves 162.1 dBc/Hz FOM at 100 kHz offset and 157.7 dBc/Hz FOM at 1kHz offset by employing a swing-boosting scheme. It also achieves 9.86 psrms period jitter corresponding to 0.01% relative jitter which is five times lower than that of the previous state-of-the-art work.
Original language | English |
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Title of host publication | ASP-DAC 2018 - 23rd Asia and South Pacific Design Automation Conference, Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 277-278 |
Number of pages | 2 |
ISBN (Electronic) | 9781509006021 |
DOIs | |
State | Published - 20 Feb 2018 |
Event | 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018 - Jeju, Korea, Republic of Duration: 22 Jan 2018 → 25 Jan 2018 |
Publication series
Name | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC |
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Volume | 2018-January |
Conference
Conference | 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018 |
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Country/Territory | Korea, Republic of |
City | Jeju |
Period | 22/01/18 → 25/01/18 |
Bibliographical note
Publisher Copyright:© 2018 IEEE.