A hardware-friendly compression algorithm for profiling DDR4 memory accesses

Xuan Truong Nguyen; Jiwoong Choi; Hyuk Jae Lee; Hyun Kim

doi:10.23919/ELINFOCOM.2019.8706388

A hardware-friendly compression algorithm for profiling DDR4 memory accesses

Xuan Truong Nguyen
, Jiwoong Choi
, Hyuk Jae Lee
, Hyun Kim

Department of Electrical Engineering and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Profiling or tracking memory accesses is a critical task in analyzing memory behavior and thereby improving memory technology. However, profiling memory accesses is a challenging task, especially from memory side, due to a large bandwidth and a huge memory storage requirement. To address this problem, this paper proposes an efficient compression algorithm for memory trace profile. A single command is firstly represented under a format of variable run length coding. Based on this, simple and efficient scheduling is presented to compress memory trace. Experimental results show that the proposed compression algorithm achieves up to 50.61% memory saving on average with a negligible overhead.

Original language	English
Title of host publication	ICEIC 2019 - International Conference on Electronics, Information, and Communication
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9788995004449
DOIs	https://doi.org/10.23919/ELINFOCOM.2019.8706388
State	Published - 3 May 2019
Event	18th International Conference on Electronics, Information, and Communication, ICEIC 2019 - Auckland, New Zealand Duration: 22 Jan 2019 → 25 Jan 2019

Publication series

Name	ICEIC 2019 - International Conference on Electronics, Information, and Communication

Conference

Conference	18th International Conference on Electronics, Information, and Communication, ICEIC 2019
Country/Territory	New Zealand
City	Auckland
Period	22/01/19 → 25/01/19

Bibliographical note

Publisher Copyright:
© 2019 Institute of Electronics and Information Engineers (IEIE).

Keywords

DDR4 command
Memory compression
Memory trace profile

Access to Document

10.23919/ELINFOCOM.2019.8706388

Cite this

Nguyen, X. T., Choi, J., Lee, H. J., & Kim, H. (2019). A hardware-friendly compression algorithm for profiling DDR4 memory accesses. In ICEIC 2019 - International Conference on Electronics, Information, and Communication Article 8706388 (ICEIC 2019 - International Conference on Electronics, Information, and Communication). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/ELINFOCOM.2019.8706388

Nguyen, Xuan Truong ; Choi, Jiwoong ; Lee, Hyuk Jae et al. / A hardware-friendly compression algorithm for profiling DDR4 memory accesses. ICEIC 2019 - International Conference on Electronics, Information, and Communication. Institute of Electrical and Electronics Engineers Inc., 2019. (ICEIC 2019 - International Conference on Electronics, Information, and Communication).

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title = "A hardware-friendly compression algorithm for profiling DDR4 memory accesses",

abstract = "Profiling or tracking memory accesses is a critical task in analyzing memory behavior and thereby improving memory technology. However, profiling memory accesses is a challenging task, especially from memory side, due to a large bandwidth and a huge memory storage requirement. To address this problem, this paper proposes an efficient compression algorithm for memory trace profile. A single command is firstly represented under a format of variable run length coding. Based on this, simple and efficient scheduling is presented to compress memory trace. Experimental results show that the proposed compression algorithm achieves up to 50.61\% memory saving on average with a negligible overhead.",

keywords = "DDR4 command, Memory compression, Memory trace profile",

author = "Nguyen, \{Xuan Truong\} and Jiwoong Choi and Lee, \{Hyuk Jae\} and Hyun Kim",

note = "Publisher Copyright: {\textcopyright} 2019 Institute of Electronics and Information Engineers (IEIE).; 18th International Conference on Electronics, Information, and Communication, ICEIC 2019 ; Conference date: 22-01-2019 Through 25-01-2019",

year = "2019",

month = may,

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doi = "10.23919/ELINFOCOM.2019.8706388",

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Nguyen, XT, Choi, J, Lee, HJ & Kim, H 2019, A hardware-friendly compression algorithm for profiling DDR4 memory accesses. in ICEIC 2019 - International Conference on Electronics, Information, and Communication., 8706388, ICEIC 2019 - International Conference on Electronics, Information, and Communication, Institute of Electrical and Electronics Engineers Inc., 18th International Conference on Electronics, Information, and Communication, ICEIC 2019, Auckland, New Zealand, 22/01/19. https://doi.org/10.23919/ELINFOCOM.2019.8706388

A hardware-friendly compression algorithm for profiling DDR4 memory accesses. / Nguyen, Xuan Truong; Choi, Jiwoong; Lee, Hyuk Jae et al.
ICEIC 2019 - International Conference on Electronics, Information, and Communication. Institute of Electrical and Electronics Engineers Inc., 2019. 8706388 (ICEIC 2019 - International Conference on Electronics, Information, and Communication).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A hardware-friendly compression algorithm for profiling DDR4 memory accesses

AU - Nguyen, Xuan Truong

AU - Choi, Jiwoong

AU - Lee, Hyuk Jae

AU - Kim, Hyun

PY - 2019/5/3

Y1 - 2019/5/3

N2 - Profiling or tracking memory accesses is a critical task in analyzing memory behavior and thereby improving memory technology. However, profiling memory accesses is a challenging task, especially from memory side, due to a large bandwidth and a huge memory storage requirement. To address this problem, this paper proposes an efficient compression algorithm for memory trace profile. A single command is firstly represented under a format of variable run length coding. Based on this, simple and efficient scheduling is presented to compress memory trace. Experimental results show that the proposed compression algorithm achieves up to 50.61% memory saving on average with a negligible overhead.

AB - Profiling or tracking memory accesses is a critical task in analyzing memory behavior and thereby improving memory technology. However, profiling memory accesses is a challenging task, especially from memory side, due to a large bandwidth and a huge memory storage requirement. To address this problem, this paper proposes an efficient compression algorithm for memory trace profile. A single command is firstly represented under a format of variable run length coding. Based on this, simple and efficient scheduling is presented to compress memory trace. Experimental results show that the proposed compression algorithm achieves up to 50.61% memory saving on average with a negligible overhead.

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KW - Memory compression

KW - Memory trace profile

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DO - 10.23919/ELINFOCOM.2019.8706388

M3 - Conference contribution

AN - SCOPUS:85065889558

T3 - ICEIC 2019 - International Conference on Electronics, Information, and Communication

BT - ICEIC 2019 - International Conference on Electronics, Information, and Communication

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 18th International Conference on Electronics, Information, and Communication, ICEIC 2019

Y2 - 22 January 2019 through 25 January 2019

ER -

Nguyen XT, Choi J, Lee HJ, Kim H. A hardware-friendly compression algorithm for profiling DDR4 memory accesses. In ICEIC 2019 - International Conference on Electronics, Information, and Communication. Institute of Electrical and Electronics Engineers Inc. 2019. 8706388. (ICEIC 2019 - International Conference on Electronics, Information, and Communication). doi: 10.23919/ELINFOCOM.2019.8706388

A hardware-friendly compression algorithm for profiling DDR4 memory accesses

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