Abstract
In this paper, we validate the effectiveness of the bit and power loading (BPL) of discrete muti-tone (DMT) modulation over a reflective wireline channel, exhibiting notches in the signal-to-noise ratio (SNR) profile. The loading profile is optimized via the margin-adaptive Levin-Campello (LC) water-filling algorithm based on the measured per-subchannel SNR distribution. The aggregate bit-error rate (BER) is minimized by allocating only a small number of bits for low SNR subbands. The experiment is conducted with the M8196A arbitrary waveform generator (AWG) for the transmitter (TX) and the DSAX96204Q digital signal analyzer (DSA) for the receiver (RX) with the captured data and signal processing on MATLAB software. The measurement results have demonstrated that the DMT with the optimal BPL achieves 28.2 Gb/s data rate and 4.73E-6 BER when communicating over a reflective channel, showing 16.3 dB loss at 5 GHz Nyquist frequency.
| Original language | English |
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| Title of host publication | Proceedings - International SoC Design Conference 2024, ISOCC 2024 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 35-36 |
| Number of pages | 2 |
| ISBN (Electronic) | 9798350377088 |
| DOIs | |
| State | Published - 2024 |
| Event | 21st International System-on-Chip Design Conference, ISOCC 2024 - Sapporo, Japan Duration: 19 Aug 2024 → 22 Aug 2024 |
Publication series
| Name | Proceedings - International SoC Design Conference 2024, ISOCC 2024 |
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Conference
| Conference | 21st International System-on-Chip Design Conference, ISOCC 2024 |
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| Country/Territory | Japan |
| City | Sapporo |
| Period | 19/08/24 → 22/08/24 |
Bibliographical note
Publisher Copyright:© 2024 IEEE.
Keywords
- ADC-based serial link
- bit and power loading
- discrete multitone
- DMT
- notch
- PAM
- pulse amplitude modulation
- reflection
- water-filling
- wireline transceiver