A 7.1GB/s low-power 3D rendering engine in 2D array-embedded memory logic CMOS

Y. H. Park, S. H. Han, J. S. Kim, S. J. Lee, J. H. Kook, J. W. Lim, R. Woo, H. J. Yoo, J. H. Lee, J. H. Lee

Research output: Contribution to journalConference articlepeer-review

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Computer Science