A 210 nW 29.3 ppm/°C 0.7 V voltage reference with a temperature range of -50 to 130 °c in 0.13 μm CMOS

Junghyup Lee, Seonghwan Cho

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

35 Scopus citations

Abstract

A low-voltage, low-power CMOS voltage reference with high temperature stability in a wide temperature range is presented. The temperature dependence of mobility and oxide capacitance is removed by employing transistors in saturation and triode regions and the temperature dependence of threshold voltage is removed by exploiting the transistors in weak inversion region. Implemented in 0.13um CMOS, the proposed voltage reference achieves temperature coefficient of 29.3ppm/°C against temperature variation of -50 - 130°C and line sensitivity of 337ppm/V against supply variation of 0.7-1.8V, while consuming 210nW from 0.7V supply and occupying 0.023mm2.

Original languageEnglish
Title of host publication2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers
Pages278-279
Number of pages2
StatePublished - 2011
Event2011 Symposium on VLSI Circuits, VLSIC 2011 - Kyoto, Japan
Duration: 15 Jun 201117 Jun 2011

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Conference

Conference2011 Symposium on VLSI Circuits, VLSIC 2011
Country/TerritoryJapan
CityKyoto
Period15/06/1117/06/11

Keywords

  • Voltage reference
  • low power
  • low voltage
  • temperature compensation

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