Abstract
This brief presents a 2-lane discrete multitone (DMT) wireline receiver (RX) with a far-end crosstalk (FEXT) cancellation and its implementation on the ZCU111 RFSoC evaluation board for real-time functional verification. The RX datapath is implemented with the 64-parallel 128-tap multi-path delay-feedback (MDF) fast Fourier transform (FFT) to optimize resources and throughput. The multiple-input, multiple-output (MIMO) frequency-domain equalizer (FDE) compensates both channel insertion loss (IL) and FEXT based on coefficients computed from an on-chip pilot-assist channel estimation (CHEST). The platform includes a programmable logic (PL) for a DMT digital signal processor (DSP) running at 32 MHz, 2.048 GS/s data converters, and intersymbol interference (ISI)/FEXT board. This system enables the reflection of a realistic hardware impairment and real-time transceiver (TRX) operation with a quick bit error rate (BER) test. The measurement demonstrates that the MIMO DMT significantly improves a BER from 1.0E-2 to 5.8E-7 when the FEXT is canceled for a channel exhibiting 15 dB of IL and 10 dB of IL-to-crosstalk ratio (ICR) at Nyquist frequency.
| Original language | English |
|---|---|
| Pages (from-to) | 4738-4742 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 71 |
| Issue number | 11 |
| DOIs | |
| State | Published - 2024 |
Bibliographical note
Publisher Copyright:© 2004-2012 IEEE.
Keywords
- ADC-based serial link
- DMT
- FEXT
- FPGA
- RFSoC
- Serial link
- discrete multitone
- far-end crosstalk
- field-programmable gate array
- wireline transceiver
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