A 1.5 GHz spread spectrum clock generator with a 5000ppm piecewise linear modulation

Minyoung Song, Sunghoon Ahn, Inhwa Jung, Yongtae Kim, Chulwoo Kim

Research output: Contribution to journalConference articlepeer-review

10 Scopus citations

Abstract

A spread spectrum clock generator is implemented in a 0.18μm CMOS process employing the proposed piecewise linear modulation profile to significantly reduce EMI with a simple implementation. A high resolution fractional divider to reduce quantization noise from the modulation is proposed as well. A peak power reduction level of 14.2dB with 5000ppm down spreading and 27.88pspp of jitter in the SSCG without modulation are measured.

Original languageEnglish
Article number4672119
Pages (from-to)455-458
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
DOIs
StatePublished - 2008
EventIEEE 2008 Custom Integrated Circuits Conference, CICC 2008 - San Jose, CA, United States
Duration: 21 Sep 200824 Sep 2008

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