A 114-aFrms-Resolution 46-NF/10-MΩ-Range Digital-Intensive Reconfigurable RC-to-Digital Converter with Parasitic-Insensitive Femto-Farad Baseline Sensing

Arup K. George, Wooyoon Shim, Minkyu Je, Junghyup Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

18 Scopus citations

Abstract

This paper presents a digital-intensive dynamically reconfigurable RC-to-digital converter with an input range of 46 nF/10 MΩ, suitable for reading out R or C sensors in a time-interleaved way. Its reconfigurability also allows parasitic-insensitive sensing of femto-farad baseline capacitances. Implemented in a 0.18-μm CMOS process, it uses a swing-boosted period-modulation (SB-PM) frontend, achieving a capacitance resolution of 114 aFrms corresponding to an FOM of 4.04 pJ/conversion-step from a 1-V supply.

Original languageEnglish
Title of host publication2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages157-158
Number of pages2
ISBN (Electronic)9781538667002
DOIs
StatePublished - 22 Oct 2018
Event32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018 - Honolulu, United States
Duration: 18 Jun 201822 Jun 2018

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume2018-June

Conference

Conference32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018
Country/TerritoryUnited States
CityHonolulu
Period18/06/1822/06/18

Bibliographical note

Publisher Copyright:
© 2018 IEEE.

Keywords

  • Capacitance/resistance-to-digital converter
  • low voltage
  • parasitic insensitive
  • reconfigurable
  • wide input range

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