Abstract
This paper presents a digital-intensive dynamically reconfigurable RC-to-digital converter with an input range of 46 nF/10 MΩ, suitable for reading out R or C sensors in a time-interleaved way. Its reconfigurability also allows parasitic-insensitive sensing of femto-farad baseline capacitances. Implemented in a 0.18-μm CMOS process, it uses a swing-boosted period-modulation (SB-PM) frontend, achieving a capacitance resolution of 114 aFrms corresponding to an FOM of 4.04 pJ/conversion-step from a 1-V supply.
Original language | English |
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Title of host publication | 2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 157-158 |
Number of pages | 2 |
ISBN (Electronic) | 9781538667002 |
DOIs | |
State | Published - 22 Oct 2018 |
Event | 32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018 - Honolulu, United States Duration: 18 Jun 2018 → 22 Jun 2018 |
Publication series
Name | IEEE Symposium on VLSI Circuits, Digest of Technical Papers |
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Volume | 2018-June |
Conference
Conference | 32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018 |
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Country/Territory | United States |
City | Honolulu |
Period | 18/06/18 → 22/06/18 |
Bibliographical note
Publisher Copyright:© 2018 IEEE.
Keywords
- Capacitance/resistance-to-digital converter
- low voltage
- parasitic insensitive
- reconfigurable
- wide input range