Abstract
An on-chip DFLL (Digitally Frequency Locked Loop) based wakeup timer with a time-domain trimming featuring an embedded temperature sensor is presented. The proposed trimming exploits the deterministic temperature characteristics of two complementary resistors and results in a fine trimming step (±1ppm), allowing a small frequency error after trimming (<±20ppm). The temperature sensing is running in the background with negligible power (2%) and hardware overhead (<1%). The chip is fabricated in 40nm CMOS, consumes 380nW, resulting 0.9pJ/cycle energy efficiency while achieving 8ppm/°C from -40°C to 80°C.
Original language | English |
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Title of host publication | 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781728199429 |
DOIs | |
State | Published - Jun 2020 |
Event | 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Honolulu, United States Duration: 16 Jun 2020 → 19 Jun 2020 |
Publication series
Name | IEEE Symposium on VLSI Circuits, Digest of Technical Papers |
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Volume | 2020-June |
Conference
Conference | 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 |
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Country/Territory | United States |
City | Honolulu |
Period | 16/06/20 → 19/06/20 |
Bibliographical note
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